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? 2011 microchip technology inc. ds22288a-page 1 mcp2210 features: universal serial bus (usb) ? supports full-speed usb (12 mb/s) ? human interface device (hid) device ? 128-byte buffer to handle data throughput: - 64-byte transmit - 64-byte receive ? fully configurable vid, pid assignments and string descriptor (factory programming also avail- able) ? bus powered (factory default) or self-powered (can be selected through special usb commands) ? usb 2.0 compliant usb driver and software support ? uses standard hid drivers (built-in support on windows ? xp, vista, 7, linux and mac os ? ) ? configuration utility for device?s power-up configuration ? utility for usb-spi communication, gpio manipulation and miscellaneous features usage spi master peripheral ? supports all four spi modes (mode 0, 1, 2, 3) ? bit rates from 1500 bps up to 12 mbps ? configurable delays for spi transactions: - chip select (assert) to 1 st byte of data delay - data to data delay - data to chip select (de-assert) delay ? spi transactions lengths of up to 65535 bytes long ? up to 9 chip select lines ? to be used in any combination for a given spi transaction (the chip select lines are shared between gpios and alternate function pins; certain gps ? up to 9 of them ? can be assigned with the chip select functionality) general purpose input/output (gpio) pins ? nine general purpose i/o pins eeprom ? 256 bytes of user eeprom (accessible through certain usb commands) package types: the device will be offered in the following packages: ? 20-lead qfn (5 x 5 mm) ? 20-lead soic ? 20-lead ssop other ? usb activity led output ? sspnd output pin (to signal usb suspend state) ? usbcfg output pin (indicates when the enumeration is completed) ? operating voltage: 3.3-5.5v ? oscillator input: 12 mhz ? industrial operating temperature: -40c to +85c 2 mcp2210 soic, ssop osc2 osc1 rst 1 2 3 4 20 1 9 1 8 1 7 v dd v ss d+ d- v usb gp0 5 1 6 gp8 gp1 6 15 gp2 7 14 gp6 gp7 mcp2210 5x5 qfn* gp1 gp2 rst d- v usb mosi gp8 gp4 sck gp5 gp7 osc2 osc1 v dd v ss gp0 ep 20 1 1 9 1 8 1 7 3 4 1 5 1 4 1 3 12 6789 21 1 3 1 2 1 1 miso gp5 sck gp3 8 mosi 9 gp4 10 d+ 1 6 gp3 gp6 5 11 miso 10 * includes exposed thermal pad (ep); see ta b l e 1 - 1 . usb-to-spi protocol converte r with gpio (master mode)
mcp2210 ds22288a-page 2 ? 2011 microchip technology inc. block diagram gpio control usb protocol controller usb xcvr v ss osc state clock usb clock reset 3.3v ldo 256-byte eeprom configuration and control regs spi (master) baud generator chip select control gp8-gp0 d+ d- v usb v dd rst osc1 osc2 vss mosi miso sck cs8:0 dedicated function pins
? 2011 microchip technology inc. ds22288a-page 3 mcp2210 1.0 functional description the mcp2210 device is a usb-to-spi master converter which enables usb connectivity in applications that have an spi interface. the device reduces external components by integrating the usb termination resistors. the mcp2210 also has 256 bytes of integrated user eeprom. the mcp2210 has nine general purpose input/output pins. seven pins have alternate functions to indicate usb and communication status. see tab l e 1 - 1 and section 1.6 ?gp module? for details about the pin functions. table 1-1: pinout description mcp2210 symbol type standard function (gpio) alternate function 1 (chip selects) alternate function 2 (dedicated functions) description qfn soic, ssop 14rst i? ? ? reset input 2 5 gp0 i/o gpio0 cs0 ? general purpose i/o 3 6 gp1 i/o gpio1 cs1 ? general purpose i/o 4 7 gp2 i/o gpio2 cs2 usb suspend general purpose i/o 5 8 gp3 i/o gpio3 cs3 spi transfer traffic led general purpose i/o 6 9 mosi o ? ? ? spi master output 7 10 gp4 i/o gpio4 cs4 usb low power general purpose i/o 8 11 sck o ? ? ? spi clock output 9 12 gp5 i/o gpio5 cs5 usb configured general purpose i/o 10 13 miso i ? ? ? spi master input 11 14 gp6 i/o gpio6 cs6 external interrupt general purpose i/o 12 15 gp7 i/o gpio7 cs7 spi bus release ack general purpose i/o 13 16 gp8 i/o gpio8 cs8 spi bus release req general purpose i/o 14 17 v usb usb ? ? ? usb regulator output 15 18 d- usb ? ? ? usb d- 16 19 d+ usb ? ? ? usb d+ 17 20 v ss gnd ? ? ? ground 18 1 v dd p? ? ? power 19 2 osc1 i ? ? ? oscillator input 20 3 osc2 o ? ? ? oscillator output
mcp2210 ds22288a-page 4 ? 2011 microchip technology inc. 1.1 supported operating systems the following operating systems are supported: ? windows xp/vista/7 ?linux ?mac os 1.1.1 enumeration the mcp2210 will enumerate as a usb device after power-on reset (por). the device enumerates as a human interface device (hid) only. 1.1.1.1 human interface device (hid) the mcp2210 enumerates as an hid, so the device can be configured and all the other functionalities can be controlled. a dll package that facilitates i/o control through a custom interface is supplied by microchip and is available on the product landing page. 1.2 control module the control module is the heart of the mcp2210. all other modules are tied together and controlled via the control module. the control module manages the data transfers between the usb and the spi, as well as command requests generated by the usb host controller, and commands for controlling the function of the spi and i/o. 1.2.1 spi interface the control module interfaces to the spi and usb modules. 1.2.2 interfacing to the device the mcp2210 can be accessed for reading and writing via usb host commands. the device cannot be accessed and controlled via the spi interface. 1.3 spi module the mcp2210 spi module provides the mosi, miso and sck signals to the outside world. the module has the ability to control the gp pins (as chip select) only if these pins are configured for chip select operation. 1.3.1 spi module features the spi module has the following configurable features: ?bit rates ?delays ? chip select pin assignments (up to 9 chip select lines) all the above features are available for customization using certain usb commands. 1.3.2 spi module power-up configuration default parameters: ?1mbit ? 4 bytes to transfer per spi transaction ? gp1 as chip select line 1.4 usb protocol controller the usb controller in the mcp2210 is full-speed usb 2.0 compliant. ? hid only device used for: - spi transfers - i/o control - eeprom access - chip configuration manipulation ? 128-byte buffer to handle data for spi transfers - 64-byte transmit - 64-byte receive ? fully configurable vid, pid assignments, string descriptors (stored on-chip) and chip power-up settings (default chip settings and spi transfer parameters) ? bus powered or self-powered 1.4.1 descriptors the string descriptors are stored internally in the mcp2210 and they can be changed so when the chip enumerates, the host gets the customer?s own product and manufacturer names. they can be customized to the user?s needs by using the microchip provided con- figuration utility or a custom built application that will send the proper usb commands for storing the new descriptors into the chip. 1.4.2 usb events the mcp2210 provides support for signaling important usb-related events such as: ? usb suspend and resume ? these states are signaled on the gp2, if the pin is configured for its dedicated function - usb suspend mode is entered when a suspend signaling event is detected on the usb bus - usb resume is signaled when one of the following events is occurring: a) resume signaling is detected or generated b) a usb reset signal is detected c) a device reset occurs ? usb device enumerated successfully (this state is signaled if the gp4 is configured for its dedicated function) ? usb low-power mode
? 2011 microchip technology inc. ds22288a-page 5 mcp2210 1.5 usb transceiver the mcp2210 has a built-in, usb 2.0, full-speed transceiver internally connected to the usb module. the usb transceiver obtains power from the v usb pin, which is internally connected to a 3.3v internal regulator. the best electrical signal quality is obtained when v usb is locally bypassed with a high-quality ceramic capacitor. the internal 3.3v regulator draws power from the v dd pin. in certain scenarios, where v dd is lower than 3.3v+ internal ldo dropout, the v usb pin must be tied to an external regulated 3.3v. this will allow the usb transceiver to work correctly, while the i/o voltage in the rest of the system can be lower than 3.3v. as an example, in a system where the mcp2210 is used and the i/o required is of 2.2v, the v dd of the chip will be tied to the 2.2v digital power rail, while the v usb pin must be connected to a regulated 3.3v power supply. 1.5.1 internal pull-up resistors the mcp2210 device has built-in pull-up resistors designed to meet the requirements for full-speed usb. 1.5.2 mcp2210 power options the following are the main power options for the mcp2210: ? usb bus powered (5v) ? self powered (from 3.3v to 5v), while the v usb pin is supplied with 3.3v (regulated). if the v dd is powered with 5v, then the v usb will be powered by the internal regulator and the v usb pin will need only a decoupling capacitor 1.5.2.1 internal power supply details mcp2210 offers various options for power supply. to meet the required usb signaling levels, mcp2210 device incorporates an internal ldo used solely by the usb transceiver, in order to present the correct d+/d voltage levels. figure 1-1 shows the internal connections of the usb transceiver ldo in relation with the v dd power supply rail. the output of the usb transceiver ldo is tied to the v usb line. a capacitor connected to the v usb pin is required if the usb transceiver ldo provides the 3.3v supply to the transceiver. figure 1-1: mcp2210 internal power supply details the provided v dd voltage has a direct influence on the voltage levels present on the gpio and spi module pins (gp8-gp0, mosi, miso and sck). when v dd is 5v, all of these pins will have a logical ? 1 ? around 5v with the variations specified in section 4.1 ?dc char- acteristics? . for applications that require a 3.3v logical ? 1 ? level, v dd must be connected to a power supply providing the 3.3v voltage. in this case, the internal usb transceiver ldo cannot provide the required 3.3v power. it is necessary to also connect the v usb pin of the mcp2210 to the 3.3v power supply rail. this way, the usb transceiver is powered up directly from the 3.3v power supply. 1.5.2.2 usb bus powered (5v) in bus power only mode, the entire power for the application is drawn from the usb (see figure 1-2 ). this is effectively the simplest power method for the device. figure 1-2: bus power only ldo 3.3v usb transceiver d+ v dd v usb d- in out v dd v usb v ss v bus
mcp2210 ds22288a-page 6 ? 2011 microchip technology inc. in order to meet the inrush current requirements of the usb 2.0 specifications, the total effective capacitance appearing across v bus and ground must be no more than 10 f. if it is more than 10 f, some kind of inrush limiting is required. for more details on inrush current limiting, see the current universal serial bus specifi- cation . according to the usb 2.0 specification, all usb devices must also support a low-power suspend mode. in the usb suspend mode, devices must consume no more than 500 a (or 2.5 ma for high powered devices that are remote wake-up capable) from the 5v v bus line of the usb cable. the host signals the usb device to enter suspend mode by stopping all usb traffic to that device for more than 3 ms. the usb bus provides a 5v voltage. however, the usb transceiver requires 3.3v for the signaling (on d+ and d- lines). during usb suspend mode, the d+ or d- pull-up resis- tor must remain active, which will consume some of the allowed suspend current budget (500 a/2.5 ma). the v usb pin is required to have an external bypass capacitor. it is recommended that the capacitor be a ceramic cap, between 0.22 and 0.47 f. figure 1-3 shows a circuit where the mcp2210 internal ldo is used to provide 3.3v to the usb transceiver. the voltage on the v dd affects the voltage levels onto the gp and spi module pins (gp8-gp0, mosi, miso and sck). with v dd at 5v, these pins will have a logic ? 1 ? of 5v with the variations specified in section 4.1 ?dc characteristics? . figure 1-3: typical power supply option using the 5v provided by the usb 1.5.2.3 3.3v ? self powered typically, many embedded applications are using 3.3v or lower power supplies. when such an option is avail- able in the target system, mcp2210 can be powered up (v dd ) from the existing power supply rail. the typi- cal connections for mcp2210 powered from 3.3v rail are shown in figure 1-4 . in this example mcp2210 has both v dd and v usb lines tied to the 3.3v rail. these tied connections disable the internal usb transceiver ldo of the mcp2210 to regulate the power supply on v usb pin. another consequence is that the ? 1 ? logical level on the gp and spi pins will be at the 3.3v level, in accordance with the variations specified in section 4.1 ?dc characteristics? . figure 1-4: using an externally provided 3.3v power supply ldo 3.3v usb transceiver d+ v dd v usb d- in out 5v (usb bus) or external power supply ldo 3.3v d+ v dd v usb d- in out 5v (usb bus) or external power supply external usb transceiver 3.3v ldo
? 2011 microchip technology inc. ds22288a-page 7 mcp2210 1.6 gp module the gp module features nine i/o lines. 1.6.1 configurable pin functions the pins can be configured as: ? gpio ? individually configurable, general purpose input or output ? chip select pins ? used by the spi module ? alternate function pins ? used for miscellaneous features such as: - sspnd ? usb suspend and resume states - usbcfg ? indicates usb configuration status -lowpwr ? signals when the host does not accept the requirements (presented during enumeration) and the chip is not configured. in this mode, the whole system powered from the usb host should draw up to 100 ma. - external interrupt input ? used to count external events - spi bus release request ? used to request spi bus access from the mcp2210 - spi bus release acknowledge ? used to acknowledge when the mcp2210 has released the spi bus - led ? indicates spi traffic led 1.6.1.1 gpio pins function the gp pins (if enabled for gpio functionality) can be used as digital inputs/outputs. these pins can be read (both inputs and outputs) and written (only the outputs). 1.6.1.2 chip select pins function the gp pins (if enabled for the chip select functional- ity) are controlled by the spi module. their idle/active value is determined by the spi transfer parameters. 1.6.1.3 sspnd pin function the gp2 pin (if enabled for this functionality) reflects the usb state (suspend/resume). the pin is active ?low? when the suspend state has been issued by the usb host. likewise, the pin drives ?high? after the resume state is achieved. this pin allows the application to go into low-power mode when usb communication is suspended, and switches to a full active state when usb activity is resumed. 1.6.1.4 usbcfg pin function the gp5 pin (if enabled for this functionality) starts out ?high? during power-up or after reset, and goes ?low? after the device successfully configures to the usb. the pin will go ?high? when in suspend mode and ?low? when the usb resumes. 1.6.1.5 lowpwr pin function the gp4 pin (if enabled for this functionality) starts out ?low? during power-up or after reset, and goes ?high? after the device successfully configures to the usb. the pin will go ?low? when in suspend mode and ?high? when the usb resumes. 1.6.1.6 external interrupt input pin function the gp4 pin (if enabled for this functionality) is used as an interrupt input pin and it will count interrupt events such as: ? falling edges ? rising edges ? low-logic pulses ? high-logic pulses 1.6.1.7 spi bus release request pin function the gp8 pin (if enabled for this functionality) is used by an external device to request the mcp2210 to release the spi bus. this way, more than one spi master can have access to the spi slave chips on the bus. when this pin is driven ?low?, the mcp2210 will examine the request and, based on the conditions and internal logic, it might release the spi bus. if there is an ongoing spi transfer taking place at the moment when an external device requests the bus, mcp2210 will release it after the transfer is completed or if the usb host cancels the current spi transfer. 1.6.1.8 spi bus release acknowledge pin function the gp7 pin (if enabled for this functionality) is used by the mcp2210 to signal back if the spi bus was released. when a spi bus release request is registered by the mcp2210, based on the condition and internal logic, the chip might release the bus. the bus is released immediately if there is no spi transfer taking place, or it will do so after the current spi transfer is finished or cancelled by the usb host. 1.6.1.9 led pin function the gp3 pin (if enabled for this functionality) is used as an spi traffic indication. when an spi transfer is taking place (active state for this pin), this pin will be driven ?low?. when there is no spi traffic taking place, the pin is in its inactive state or logic ?high?.
mcp2210 ds22288a-page 8 ? 2011 microchip technology inc. 1.7 eeprom module the eeprom module is a 256-byte array of nonvola- tile memory. the memory locations are accessed for read/write operations solely via usb host commands. the memory cells for data eeprom are rated to endure thousands of erase/write cycles, up to 100k for eeprom. data retention without refresh is conservatively estimated to be greater than 40 years. 1.8 reset/por 1.8.1 reset pin the rst pin provides a method for triggering an external reset of the device. a reset is generated by holding the pin low. mcp2210 has a noise filter in the reset path which detects and ignores small pulses. 1.8.2 por a por pulse is generated on-chip whenever v dd rises above a certain threshold. this allows the device to start in the initialized state when v dd is adequate for operation. to take advantage of the por circuitry, tie the rst pin through a resistor (1 k ? to 10 k ? ) to v dd . this will eliminate external rc components usually needed to create a por delay. when the device starts normal operation (i.e., exits the reset condition), the device operating parameters (voltage, frequency, temperature, etc.) must be met to ensure operation. if these conditions are not achieved, the device must be held in reset until the operating conditions are met. 1.9 oscillator the input clock must be 12 mhz to provide the proper frequency for the usb module. usb full-speed is nominally 12 mb/s. the clock input accuracy is 0.25% (2,500 ppm maximum). figure 1-5: quartz crystal operation figure 1-6: ceramic resonator operation quartz crystal 12 mhz osc1 osc2 r s ( 1 ) r f ( 2 ) mcp2210 note 1: a series resistor (r s ) may be required for quartz crystals with high drive level. 2: the value of r f is typically between 2 m ? to 10 m ? .. example: murata ? cstce12m0g15l osc1 osc2 resonator 12 mhz mcp2210
? 2011 microchip technology inc. ds22288a-page 9 mcp2210 2.0 mcp2210 functional description the mcp2210 uses nvram to store relevant chip settings. these settings are loaded by the chip during the power-up process and they are used for gp designation and spi transfers. the nvram settings at power-up (or reset) are loaded into the ram portion of the chip and they can be altered through certain usb commands. this is very useful since it allows dynamic reconfiguring of the gps or spi transfer parameters. a practical example to illustrate this mechanism is a system which uses at least two spi slave chips and the gps in the mcp2210 for various gpio purposes. the default spi settings might be ok for one of the spi slave chips, but not for the 2 nd . at first, the pc application will make an spi transfer to the first chip, using the nvram copy of the spi settings. then, by sending a certain usb command, the spi transfer settings residing in ram will be altered in order to fit the spi transfer requirements of the second chip. also, if the altered spi transfer settings are needed to be the default power-up (or reset) settings for spi, the user can send a series of usb commands in order to store the current (ram) spi settings into nvram. in this way, these new settings will be the power-up default spi settings. the nvram settings and eeprom contents can be protected by password access means, or they can be permanently locked without any possible further modification. 2.1 mcp2210 nvram settings the chip settings that can be stored in the nvram area are as follows: ? spi transfer parameters: - spi bit rate - spi mode - idle chip select values - active chip select values - spi transfer configurable delays - number of bytes to read/write for the given spi transfer ? gp designation: -gpio - chip select - dedicated function ? gpio default direction (applies only to those gps designated as gpios) ? gpio default output value (applies only to those gps designated as output gpios) ? chip mode flags: - remote wake-up capability - external interrupt pin mode (applies only when gp6 is designated for this function) - spi bus release enable/disable ? enable/ disable the release of the spi bus when there is no spi transfer (useful when more than one spi master on the bus) ? nvram access mode: - full access (no protection ? factory default) - password protection - permanently locked ? password (relevant when password protection mechanism is active) the specified settings are loaded at power-up or reset moments, and they can be altered through certain usb commands. when a nvram conditional access method is already in place, such as password protection, the nvram settings modification is permitted only when the user has supplied the correct password for the chip. the ram settings can be altered even when a password protection or permanent lock mechanism are in place. this allows the user to communicate with various spi slave chips without knowing the password, but it will not allow the modification of the power-up default settings in nvram. 2.2 spi transfers the mcp2210 device provides advanced spi communication features such as configurable delays and multiple chip select support. the configurable delays are related to certain aspects of the spi transfer: ? the delay between the assertion of chip select(s) and the first data byte ( figure 2-1 ) figure 2-1: chip select to data delay t cs2data cs sck mosi miso
mcp2210 ds22288a-page 10 ? 2011 microchip technology inc. ? the delay between subsequent data bytes ( figure 2-2 ) figure 2-2: data-to-data delay ? the delay between the end of the last byte (of the spi transfer) and the de-assertion of the chip select(s) figure 2-3: data to chip select delay for a particular spi transfer, the user can choose any number (out of the available ones) of chip select pins. the spi transfer parameters contain two fields where the user will specify the chip select values when the spi transfer is active/idle. this mechanism allows the user to specify any combination of chip select values for the idle mode and some other combination for the active mode (spi transfer active). t data2data cs sck mosi miso t data2cs cs sck mosi miso
? 2011 microchip technology inc. ds22288a-page 11 mcp2210 3.0 usb commands/responses description mcp2210 implements the hid interface for all the device-provided functionalities. the chip uses a command/response mechanism for the usb engine. this means that for every usb command sent (by the usb host) to the mcp2210, it will always reply with a response packet. the mcp2210 usb commands can be grouped by their provided features as follows: ? nvram settings - read/write nvram related parameters - send access password ? read/write ram settings (copied from nvram at power-up or reset): - read/write (volatile ? ram stored settings) spi transfer settings - read/write (volatile ? ram stored settings) chip settings - read/write (volatile ? ram stored settings) gpio direction - read/write (volatile ? ram stored settings) gpio output values ? read/write eeprom memory ? external interrupt pin (gp6) event status ? spi data transfer : - read/write spi transfer data - cancels the ongoing spi transfer - spi bus release manipulation ? chip status and unsupported commands 3.1 nvram settings the commands in this category are related to the nvram settings manipulation. 3.1.1 set chip settings power-up default table 3-1: command structure byte index meaning 0 0x60 ? set chip nvram parameters ? command code 1 0x20 ? set chip settings power-up default ? sub-command code 2 0x00 ? reserved 3 0x00 ? reserved 4 gp0 pin designation ? gpio = 0x00 ? chip selects = 0x01 ? dedicated function pin = 0x02 5 gp1 pin designation ? gpio = 0x00 ? chip selects = 0x01 ? dedicated function pin = 0x02 6 gp2 pin designation ? gpio = 0x00 ? chip selects = 0x01 ? dedicated function pin = 0x02 7 gp3 pin designation ? gpio = 0x00 ? chip selects = 0x01 ? dedicated function pin = 0x02 8 gp4 pin designation ? gpio = 0x00 ? chip selects = 0x01 ? dedicated function pin = 0x02
mcp2210 ds22288a-page 12 ? 2011 microchip technology inc. 9 gp5 pin designation ? gpio = 0x00 ? chip selects = 0x01 ? dedicated function pin = 0x02 10 gp6 pin designation ? gpio = 0x00 ? chip selects = 0x01 ? dedicated function pin = 0x02 11 gp7 pin designation ? gpio = 0x00 ? chip selects = 0x01 ? dedicated function pin = 0x02 12 gp8 pin designation ? gpio = 0x00 ? chip selects = 0x01 ? dedicated function pin = 0x02 13 default gpio output ? 16-bit value (low byte): ? msb ? ? ? ? ? ? lsb gp7val gp6val gp5val gp4val gp3val gp2val gp1val gp0val 14 default gpio output ? 16-bit value (high byte): ? msb ? ? ? ? ? ? lsb x x x x x x x gp8val where x = don?t care 15 default gpio direction ? 16-bit value (low byte): ? msb ? ? ? ? ? ? lsb gp7dir gp6dir gp5dir gp4dir gp3dir gp2dir gp1dir gp0dir 16 default gpio direction ? 16-bit value (high byte): ? msb ? ? ? ? ? ? lsb x x x x x x x gp8dir table 3-1: command structure (continued) byte index meaning
? 2011 microchip technology inc. ds22288a-page 13 mcp2210 3.1.1.1 responses 17 other chip settings ? enable/disable wake-up, interrupt counting, spi bus release options ? bit 7 ? don?t care ? bit 6 ? don?t care ? bit 5 ? don?t care ? bit 4 ? remote wake-up enabled/disabled - 0 ? remote wake-up disabled - 1 ? remote wake-up enabled ? bit 3 ? dedicated function ? interrupt pin mode ? bit 2 ? dedicated function ? interrupt pin mode ? bit 1 ? dedicated function ? interrupt pin mode - b111 ? reserved - b110 ? reserved - b101 ? reserved - b100 ? count high pulses - b011 ? count low pulses - b010 ? count rising edges - b001 ? count falling edges - b000 ? no interrupt counting ? bit 0 ? spi bus release enable - 0 = spi bus is released between transfer - 1 = spi bus is not released by the mcp2210 between transfers 18 nvram chip parameters access control ? 0x00 ? chip settings not protected ? 0x40 ? chip settings protected by password access ? 0x80 ? chip settings permanently locked 19 new password character 0 ( note 1 ) 20 new password character 1 ( note 1 ) 21 new password character 2 ( note 1 ) 22 new password character 3 ( note 1 ) 23 new password character 4 ( note 1 ) 24 new password character 5 ( note 1 ) 25 new password character 6 ( note 1 ) 26 new password character 7 ( note 1 ) 27-63 reserved (fill with 0x00) note 1: when the password does not need to change, this field must be filled with 0 (it applies to (byte index 19 to 26). table 3-2: response 1 structure byte index meaning 00x60 ? set chip nvram parameters ? echos back the given command code 10xfb ? blocked access ? the provided password is not matching the one stored in the chip, or the settings are permanently locked. 2-63 don?t care table 3-1: command structure (continued) byte index meaning
mcp2210 ds22288a-page 14 ? 2011 microchip technology inc. figure 3-1: set chip settings power-up default logic flow table 3-3: response 2 structure byte index meaning 00x60 ? set chip nvram parameter s ? echos back the given command code 10x00 ? command completed successfully ? settings written 20x20 ? sub-command echoed back for set chip settings power-up default code 3-63 don?t care set nvram chip settings true response 2 requested chip settings not written wrong password false conditional access response 1 response 1 requested chip settings not written permanent lock false false true true password protected was access password previously entered correctly?
? 2011 microchip technology inc. ds22288a-page 15 mcp2210 3.1.2 set spi power-up transfer settings table 3-4: command structure byte index meaning 0 0x60 ? set chip nvram parameters ? command code 1 0x10 ? set spi power-up transfer settings ? sub-command code 2 0x00 ? reserved 3 0x00 ? reserved 4 bit rate (byte 3) ? 32-bit value (byte 0, byte 1, byte 2, byte 3) example : bit rate = 12,000,000 bps = 00b7 1b00 - this byte = 0x00 5 bit rate (byte 2) ? 32-bit value (byte 0, byte 1, byte 2, byte 3) example : bit rate = 12,000,000 bps = 00b7 1b00 - this byte = 0x1b 6 bit rate (byte 1) ? 32-bit value (byte 0, byte 1, byte 2, byte 3) example : bit rate = 12,000,000 bps = 00b7 1b00 - this byte = 0xb7 7 bit rate (byte 0) ? 32-bit value (byte 0, byte 1, byte 2, byte 3) example : bit rate = 12,000,000 bps = 00b7 1b00 - this byte = 0x00 8 idle chip select value ? 16-bit value (low byte): ? msb ? ? ? ? ? ? lsb cs7 cs6 cs5 cs4 cs3 cs2 cs1 cs0 9 idle chip select value ? 16-bit value (high byte): ? msb ? ? ? ? ? ? lsb x x x x x x x cs8 10 active chip select value ? 16-bit value (low byte): ? msb ? ? ? ? ? ? lsb cs7 cs6 cs5 cs4 cs3 cs2 cs1 cs0 11 active chip select value ? 16-bit value (high byte): ? msb ? ? ? ? ? ? lsb x x x x x x x cs8 12 chip select to data delay (quanta of 100 s) ? 16-bit value (low byte) example : if a 500 s delay between the cs being asserted and the first byte of data is required, the value will be 0x0005. - fill this byte position with: 0x05 13 chip select to data delay (quanta of 100 s) ? 16-bit value (high byte) example : if a 500 s delay between the cs being asserted and the first byte of data is required, the value will be 0x0005. - fill this byte position with: 0x00 14 last data byte to cs (de-asserted) delay (quanta of 100 s) ? 16-bit value (low byte) example : if a 500 s delay between the last data byte sent and the cs being de-asserted is required, the value will be 0x0005. - fill this byte position with: 0x05 15 last data byte to cs (de-asserted) delay (quanta of 100 s) ? 16-bit value (high byte) example : if a 500 s delay between the last data byte sent and the cs being de-asserted is required, the value will be 0x0005. - fill this byte position with: 0x00 16 delay between subsequent data bytes (quanta of 100 s) ? 16-bit value (low byte) example : if a 500 s delay between two consecutive data bytes is required, the value will be 0x0005. - fill this byte position with: 0x05
mcp2210 ds22288a-page 16 ? 2011 microchip technology inc. 3.1.2.1 responses 17 delay between subsequent data bytes (quanta of 100 s) ? 16-bit value (high byte) example : if 500 s delay between two consecutive data bytes is required, the value will be 0x0005. - fill this byte position with: 0x00 18 bytes to transfer per spi transaction ? 16-bit value (low byte) example : if an spi transaction of 1250 bytes long is required, the corresponding hex value will be 0x04e2. - fill this byte position with: 0xe2 19 bytes to transfer per spi transaction ? 16-bit value (high byte) example : if an spi transaction of 1250 bytes long is required, the corresponding hex value will be 0x04e2. - fill this byte position with: 0x04 20 spi mode ? 0x00 ? spi mode 0 ? 0x01 ? spi mode 1 ? 0x02 ? spi mode 2 ? 0x03 ? spi mode 3 21 - 63 reserved ? fill with 0x00 table 3-5: response 1 structure byte index meaning 0 0x60 ? set chip nvram parameters ? echos back the given command code 10xfb ? blocked access ? access password has not been provided or the settings are permanently locked. 2-63 don?t care table 3-4: command structure (continued) byte index meaning table 3-6: response 2 structure byte index meaning 00x60 ? set chip nvram parameters ? echos back the given command code 10xf8 ? usb transfer in progress ? settings not written 20x10 ? sub-command echoed back ? set spi power-up transfer settings 3-63 don?t care table 3-7: response 3 structure byte index meaning 0 0x60 ? set chip nvram parameters ? echos back the given command code 1 0x00 ? command completed successfully ? settings written 2 0x10 ? sub-command echoed back for set spi power-up transfer settings code 3-63 don?t care
? 2011 microchip technology inc. ds22288a-page 17 mcp2210 figure 3-2: set spi power-up transfer settings logic flow set nvram spi transfers settings true response 2 requested nvram spi settings not written true true true false false false false spi transfer ongoing requested nvram spi settings not written permanent lock requested nvram spi settings not written wrong password response 1 response 1 response 3 conditional access password protected was access password previously entered correctly?
mcp2210 ds22288a-page 18 ? 2011 microchip technology inc. 3.1.3 set usb power-up key parameters 3.1.3.1 responses table 3-8: command structure byte index meaning 0 0x60 ? set chip nvram parameters ? command code 1 0x30 ? set usb power-up key parameters ? sub-command code 2 0x00 ? reserved 3 0x00 ? reserved 4 vid ? 16-bit value (low byte) 5 vid ? 16-bit value (high byte) 6 pid ? 16-bit value (low byte) 7 vid ? 16-bit value (high byte) 8 chip power option (as per usb specs ? chapter 9) ? bit 7 ? host powered ( 1 = yes; 0 = no) ? bit 6 ? self powered ( 1 = yes; 0 = no) ? bit 5 ? remote wake-up capable ? bit 4 ? reserved ? fill with 0 ? bit 3 ? reserved ? fill with 0 ? bit 2 ? reserved ? fill with 0 ? bit 1 ? reserved ? fill with 0 ? bit 0 ? reserved ? fill with 0 note: only bit 6 or bit 7 should be set, not both. 9 requested current amount from usb host (quanta of 2 ma) example : for 100 ma fill this byte index with 50 (in decimal) or 0x32. 10-63 reserved ? fill with 0x00 table 3-9: response 1 structure byte index meaning 00x60 ? set chip nvram parameters ? echo back the given command code 10xfb ? blocked access ? the provided password is not matching the one stored in the chip or the settings are permanently locked. 2-63 don?t care table 3-10: response 2 structure byte index meaning 00x60 ? set chip nvram parameters ? echo back the given command code 10x00 ? command completed successfully ? settings written 20x30 ? sub-command echoed back for set usb power-up key parameters code 3-63 don?t care
? 2011 microchip technology inc. ds22288a-page 19 mcp2210 figure 3-3: set usb power-up key parameters logic flow set nvram usb key parameters true requested usb parameters not written wrong password false response 1 conditional access password protected was access password previously entered correctly? true true false false response 1 response 2 requested usb parameters not written permanent lock
mcp2210 ds22288a-page 20 ? 2011 microchip technology inc. 3.1.4 set usb manufacturer name 3.1.4.1 responses table 3-11: command structure byte index meaning 0 0x60 ? set chip nvram parameters ? command code 1 0x50 ? set usb manufacturer name ? sub-command code 2 0x00 ? reserved 3 0x00 ? reserved 4 total usb string descriptor length (this is the length of the manufacturer string, multiplied by 2 + 2) example : ?microchip technology inc.? has 25 unicode characters. - the value to be filled in is: (25 x 2) + 2 = 52 (decimal) = 0x34 5 usb string descriptor id ? always fill with 0x03 6 unicode character low byte example : for the ?microchip technology inc.? unicode string, place here the low byte of the unicode for character ?m?. - fill this index with 0x4d 7 unicode character high byte example : for the ?microchip technology inc.? unicode string, place here the high byte of the unicode for character ?m?. - fill this index with 0x00 8-63 fill in the remaining unicode characters in the string table 3-12: response 1 structure byte index meaning 00x60 ? set chip nvram parameters ? echos back the given command code 10xfb ? blocked access ? the provided password is not matching the one stored in the chip or the settings are permanently locked. 2-63 don?t care table 3-13: response 2 structure byte index meaning 00x60 ? set chip nvram parameters ? echos back the given command code 10x00 ? command completed successfully ? settings written 20x50 ? sub-command echoed back for set usb manufacturer name code 3-63 don?t care
? 2011 microchip technology inc. ds22288a-page 21 mcp2210 figure 3-4: set usb manufacturer logic flow set nvram usb manufacturer name true requested manufacturer name not written wrong password false conditional access password protected response 1 false false true true was access password previously entered correctly? response 1 response 1 requested manufacturer name not written permanent lock
mcp2210 ds22288a-page 22 ? 2011 microchip technology inc. 3.1.5 set usb product name 3.1.5.1 responses table 3-14: command structure byte index meaning 00x60 ? set chip nvram parameters ? command code 10x40 ? set usb product name ? sub-command code 20x00 ? reserved 30x00 ? reserved 4 total usb string descriptor length (this is the length of the product string multiplied by 2 + 2) example : ?mcp2210 usb to spi master? has 25 unicode characters. - the value to be filled in is: (25 * 2) + 2 = 52 (decimal) = 0x34 5 usb string descriptor id ? always fill with 0x03 6 unicode character low byte example : for the ?mcp2210 usb to spi master? unicode string, place here the low byte of the unicode for character ?m?. - fill this index with 0x4d 7 unicode character high byte example : for the ?mcp2210 usb to spi master? unicode string, place here the high byte of the unicode for character ?m?. - fill this index with 0x00 8-63 fill in the remaining unicode characters in the string table 3-15: response 1 structure byte index meaning 00x60 ? set chip nvram parameters ? echos back the given command code 10xfb ? blocked access ? the provided password is not matching the one stored in the chip or the settings are permanently locked. 2-63 don?t care table 3-16: response 2 structure byte index meaning 00x60 ? set chip nvram parameters ? echos back the given command code 10x00 ? command completed successfully ? settings written 20x40 ? sub-command echoed back for set usb product name code 3-63 don?t care
? 2011 microchip technology inc. ds22288a-page 23 mcp2210 figure 3-5: set usb product name logic flow set nvram usb product name true requested product name not written wrong password false conditional access password protected response 1 true true false false was access password previously entered correctly? requested product name not written permanent lock response 1 response 2
mcp2210 ds22288a-page 24 ? 2011 microchip technology inc. 3.1.6 get spi power-up transfer settings 3.1.6.1 responses table 3-17: command structure byte index meaning 00x61 ? get nvram settings ? command code 10x10 ? get spi power-up transfer settings ? sub-command code 20x00 ? reserved 3-63 0x00 ? reserved table 3-18: response 1 structure byte index meaning 0 0x61 ? get nvram settings ? echos back the given command code 10x00 ? command completed successfully 2 0x10 ? sub-command echoed back for get spi power-up transfer settings code 3 don?t care 4 bit rate (byte 3) ? 32-bit value (byte 0, byte 1, byte 2, byte 3) example : bit rate = 12,000,000 bps = 00b7 1b00 - this byte position will have a value of = 0x00 5 bit rate (byte 2) ? 32-bit value (byte 0, byte 1, byte 2, byte 3) example : bit rate = 12,000,000 bps = 00b7 1b00 - this byte position will have a value of = 0x1b 6 bit rate (byte 1) ? 32-bit value (byte 0, byte 1, byte 2, byte 3) example : bit rate = 12,000,000 bps = 00b7 1b00 - this byte position will have a value of = 0xb7 7 bit rate (byte 0) ? 32-bit value (byte 0, byte 1, byte 2, byte 3) example : bit rate = 12,000,000 bps = 00b7 1b00 - this byte position will have a value of = 0x00 8 idle chip select value ? 16-bit value (low byte): ? msb ? ? ? ? ? ? lsb cs7 cs6 cs5 cs4 cs3 cs2 cs1 cs0 9 idle chip select value ? 16-bit value (high byte): ? msb ? ? ? ? ? ? lsb x x x x x x x cs8 10 active chip select value ? 16-bit value (low byte): ? msb ? ? ? ? ? ? lsb cs7 cs6 cs5 cs4 cs3 cs2 cs1 cs0 11 active chip select value ? 16-bit value (high byte): ? msb ? ? ? ? ? ? lsb x x x x x x x cs8 12 chip select to data delay (quanta of 100 s) ? 16-bit value (low byte) example : if a 500 s delay between the cs being asserted and the first byte of data is required, the value will be 0x0005. - this byte position will have a value of: 0x05 13 chip select to data delay (quanta of 100 s) ? 16-bit value (high byte) example : if a 500 s delay between the cs being asserted and the first byte of data is required, the value will be 0x0005. - this byte position will have a value of: 0x00
? 2011 microchip technology inc. ds22288a-page 25 mcp2210 figure 3-6: get spi power-up transfer settings logic flow 14 last data byte to cs (de-asserted) delay (quanta of 100 s) ? 16-bit value (low byte) example : if a 500 s delay between the last data byte sent and the cs being de-asserted is required, the value will be 0x0005. - this byte position will have a value of: 0x05 15 last data byte to cs (de-asserted) delay (quanta of 100 s) ? 16-bit value (high byte) example : if a 500 s delay between the last data byte sent and the cs being de-asserted is required, the value will be 0x0005. - this byte position will have a value of: 0x00 16 delay between subsequent data bytes (quanta of 100 s) ? 16-bit value (low byte) example : if a 500 s delay between two consecutive data bytes is required, the value will be 0x0005. - this byte position will have a value of: 0x05 17 delay between subsequent data bytes (quanta of 100 s) ? 16-bit value (high byte) example : if a 500 s delay between two consecutive data bytes is required, the value will be 0x0005. - this byte position will have a value of: 0x00 18 bytes to transfer per spi transaction ? 16-bit value (low byte) example : if an spi transaction of 1250 bytes long is required, the corresponding hex value will be 0x04e2. - this byte position will have a value of: 0xe2 19 bytes to transfer per spi transaction ? 16-bit value (high byte) example : if an spi transaction of 1250 bytes long is required, the corresponding hex value will be 0x04e2 - this byte position will have a value of: 0x04 20 spi mode ? 0x00 ? spi mode 0 ? 0x01 ? spi mode 1 ? 0x02 ? spi mode 2 ? 0x03 ? spi mode 3 21 - 63 don?t care table 3-18: response 1 structure (continued) byte index meaning get nvram spi transfer settings response 1 nvram spi transfer settings retrieved
mcp2210 ds22288a-page 26 ? 2011 microchip technology inc. 3.1.7 get power-up chip settings 3.1.7.1 responses table 3-19: command structure byte index meaning 00x61 ? get nvram settings ? command code 10x20 ? get power-up chip settings ? sub-command code 20x00 ? reserved 3-63 0x00 ? reserved table 3-20: response 1 structure byte index meaning 0 0x61 ? get nvram settings ? echos back the given command code 1 0x00 ? command completed successfully 2 0x20 ? sub-command echoed back for get power-up chip settings code 3 don?t care 4 gp0 pin designation ? gpio = 0x00 ? chip selects = 0x01 ? dedicated function pin = 0x02 5 gp1 pin designation ? gpio = 0x00 ? chip selects = 0x01 ? dedicated function pin = 0x02 6 gp2 pin designation ? gpio = 0x00 ? chip selects = 0x01 ? dedicated function pin = 0x02 7 gp3 pin designation ? gpio = 0x00 ? chip selects = 0x01 ? dedicated function pin = 0x02 8 gp4 pin designation ? gpio = 0x00 ? chip selects = 0x01 ? dedicated function pin = 0x02 9 gp5 pin designation ? gpio = 0x00 ? chip selects = 0x01 ? dedicated function pin = 0x02 10 gp6 pin designation ? gpio = 0x00 ? chip selects = 0x01 ? dedicated function pin = 0x02
? 2011 microchip technology inc. ds22288a-page 27 mcp2210 11 gp7 pin designation ? gpio = 0x00 ? chip selects = 0x01 ? dedicated function pin = 0x02 12 gp8 pin designation ? gpio = 0x00 ? chip selects = 0x01 ? dedicated function pin = 0x02 13 default gpio output ? 16-bit value (low byte): ? msb ? ? ? ? ? ? lsb gp7 gp6 gp5 gp4 gp3 gp2 gp1 gp0 14 default gpio output ? 16-bit value (high byte): ? msb ? ? ? ? ? ? lsb x x x x x x x gp8 where x = don?t care 15 default gpio direction ? 16-bit value (low byte): ? msb ? ? ? ? ? ? lsb gp7dir gp6dir gp5dir gp4dir gp3dir gp2dir gp1dir gp0dir 16 default gpio direction ? 16-bit value (high byte): ? msb ? ? ? ? ? ? lsb x x x x x x x gp8dir 17 other chip settings ? enable/disable wake-up, interrupt counting, spi bus release options ? bit 7 ? don?t care ? bit 6 ? don?t care ? bit 5 ? don?t care ? bit 4 ? remote wake-up enabled/disabled - 0 ? remote wake-up disabled - 1 ? remote wake-up enabled ? bit 3 ? dedicated function ? interrupt pin mode ? bit 2 ? dedicated function ? interrupt pin mode ? bit 1 ? dedicated function ? interrupt pin mode - b111 ? reserved - b110 ? reserved - b101 ? reserved - b100 ? count high pulses - b011 ? count low pulses - b010 ? count rising edges - b001 ? count falling edges - b000 ? no interrupt counting ? bit 0 ? spi bus release enable - 0 = spi bus is released between transfer - 1 = spi bus is not released by the mcp2210 between transfers 18 nvram chip parameters access control ? 0x00 ? chip settings not protected ? 0x40 ? chip settings protected by password access ? 0x80 ? chip settings permanently locked 19 - 63 don?t care table 3-20: response 1 structure (continued) byte index meaning
mcp2210 ds22288a-page 28 ? 2011 microchip technology inc. figure 3-7: get power-up chip settings logic flow get nvram chip settings response 1 nvram chip settings retrieved
? 2011 microchip technology inc. ds22288a-page 29 mcp2210 3.1.8 get usb key parameters 3.1.8.1 responses figure 3-8: get usb key parameters logic flow table 3-21: command structure byte index meaning 00x61 ? get nvram settings ? command code 10x30 ? get usb key parameters ? sub-command code 20x00 ? reserved 3-63 0x00 ? reserved table 3-22: response 1 structure byte index meaning 0 0x61 ? get nvram settings ? echos back the given command code 1 0x00 ? command completed successfully 2 0x30 ? sub-command echoed back for get usb key parameters code 3-11 don?t care 12 vid low byte 13 vid high byte 14 pid low byte 15 pid high byte 16-28 don?t care 29 chip power option (as per usb specs ? chapter 9) ? bit 7 ? host powered ? bit 6 ? self powered ? bit 5 ? remote wake-up capable ? bit 4 ? don?t care ? bit 3 ? don?t care ? bit 2 ? don?t care ? bit 1 ? don?t care ? bit 0 ? don?t care 30 requested current amount from usb host (quanta of 2 ma) example : for 100 ma this byte index will have a value of 50 (in decimal) or 0x32. 31-63 don?t care get nvram usb key parameters response 1 nvram usb key parameters retrieved
mcp2210 ds22288a-page 30 ? 2011 microchip technology inc. 3.1.9 get usb manufacturer name 3.1.9.1 responses figure 3-9: get usb manufacturer name logic flow table 3-23: command structure byte index meaning 00x61 ? get nvram settings ? command code 10x50 ? get usb manufacturer name ? sub-command code 20x00 ? reserved 3-63 0x00 ? reserved table 3-24: response 1 structure byte index meaning 0 0x61 ? get nvram settings ? echos back the given command code 1 0x00 ? command completed successfully 2 0x50 ? sub-command echoed back for get usb manufacturer name code 3 don?t care 4 total usb string descriptor length (this is the length of the manufacturer string multiplied by 2 + 2) example : ?microchip technology inc.? has 25 unicode characters. - the retrieved value is: (25 x 2) + 2 = 52 (decimal) = 0x34 5 usb string descriptor id ? always 0x03 6 unicode character low byte example : for the ?microchip technology inc.? unicode string, there will be the low byte of the unicode for character ?m?. - this byte index will have a value of 0x4d 7 unicode character high byte example : for the ?microchip technology inc.? unicode string, there will be the high byte of the unicode for character ?m?. - this byte index will have a value of 0x00 8-63 remaining unicode characters get nvram usb manufacturer name response 1 nvram usb manufacturer name retrieved
? 2011 microchip technology inc. ds22288a-page 31 mcp2210 3.1.10 get usb product name 3.1.10.1 responses figure 3-10: get usb pr oduct name logic flow table 3-25: command structure byte index meaning 00x61 ? get nvram settings ? command code 10x40 ? get usb product name ? sub-command code 20x00 ? reserved 3-63 0x00 ? reserved table 3-26: response 1 structure byte index meaning 0 0x61 ? get nvram settings ? echos back the given command code 1 0x00 ? command completed successfully 2 0x40 ? sub-command echoed back for get usb product name code 3 don?t care 4 total usb string descriptor length (this is the length of the product string multiplied by 2 + 2) example : ?mcp2210 usb to spi master? has 25 unicode characters - the retrieved value is: (25 x 2) + 2 = 52 (decimal) = 0x34 5 usb string descriptor id ? always 0x03 6 unicode character low byte example : for the ?mcp2210 usb to spi master? unicode string, there will be the low byte of the unicode for character ?m?. - this byte index will have a value of 0x4d 7 unicode character high byte example : for the ?mcp2210 usb to spi master? unicode string, there will be the high byte of the unicode for character ?m?. - this byte index will have a value of 0x00 8-63 remaining unicode characters get nvram usb product name response 1 nvram usb product name retrieved
mcp2210 ds22288a-page 32 ? 2011 microchip technology inc. 3.1.11 send access password 3.1.11.1 responses table 3-27: command structure byte index meaning 0 0x70 ? send access password ? command code 1 0x00 ? reserved 2 0x00 ? reserved 3 0x00 ? reserved 4 password character 0 5 password character 1 6 password character 2 7 password character 3 8 password character 4 9 password character 5 10 password character 6 11 password character 7 12-63 0x00 ? reserved table 3-28: response 1 structure byte index meaning 00x70 ? send access password ? echos back the given command code 10x00 ? command completed successfully ? chip settings not protected 2 don?t care 3-63 don?t care table 3-29: response 2 structure byte index meaning 00x70 ? send access password ? echos back the given command code 10xfc ? access not allowed ? access rejected 2 don?t care 3-63 don?t care table 3-30: response 3 structure byte index meaning 0 0x70 ? send access password ? echos back the given command code 10xfd ? access not allowed ? chip conditional access is on, the password does not match and the number of attempts is less than the accepted threshold of 5. 2 don?t care 3-63 don?t care
? 2011 microchip technology inc. ds22288a-page 33 mcp2210 figure 3-11: send access password logic flow table 3-31: response 4 structure byte index meaning 00x70 ? send access password ? echos back the given command code 10xfb ? access not allowed ? chip conditional access is on, the password does not match and the number of attempts is above the accepted threshold of 5. the access password mechanism is temporarily blocked and no further password access will be accepted until the next power-up. 2 don?t care 3-63 don?t care table 3-32: response 5 structure byte index meaning 00x70 ? send access password ? echos back the given command code 10x00 ? command completed successfully ? chip conditional access is on, the supplied password is matching the one stored in the chip?s nvram. 2 don?t care 3-63 don?t care send access password false true false false false true true true response 1 response 2 response 4 response 3 response 5 chip settings protected chip settings not protected access granted permanent lock password protected password attempts < 5 password matched access granted chip access rejected chip access rejected chip access rejected increment the number of attempts temporarily chip access lock
mcp2210 ds22288a-page 34 ? 2011 microchip technology inc. 3.2 read/write ram settings the set of commands/responses described in this section relates to the manipulation of the ram settings (volatile). 3.2.1 get (vm) spi transfer settings 3.2.1.1 responses table 3-33: command structure byte index meaning 0 0x41 ? get (vm) spi transfer settings ? command code 1 0x00 ? reserved 2 0x00 ? reserved 3-63 0x00 ? reserved table 3-34: response 1 structure byte index meaning 0 0x41 ? get spi transfer settings (volatile memory) 1 0x00 ? command completed successfully 2 size in bytes of the spi transfer structure : 17 (in decimal) = 0x11 3 don?t care 4 bit rate (byte 3) ? 32-bit value (byte 0, byte 1, byte 2, byte 3) example : bit rate = 12,000,000 bps = 00b7 1b00 - this byte position will have a value of = 0x00 5 bit rate (byte 2) ? 32-bit value (byte 0, byte 1, byte 2, byte 3) example : bit rate = 12,000,000 bps = 00b7 1b00 - this byte position will have a value of = 0x1b 6 bit rate (byte 1) ? 32-bit value (byte 0, byte 1, byte 2, byte 3) example : bit rate = 12,000,000 bps = 00b7 1b00 - this byte position will have a value of = 0xb7 7 bit rate (byte 0) ? 32-bit value (byte 0, byte 1, byte 2, byte 3) example : bit rate = 12,000,000 bps = 00b7 1b00 - this byte position will have a value of = 0x00 8 idle chip select value ? 16-bit value (low byte): ? msb ? ? ? ? ? ? lsb cs7 cs6 cs5 cs4 cs3 cs2 cs1 cs0 9 idle chip select value ? 16-bit value (high byte): ? msb ? ? ? ? ? ? lsb x x x x x x x cs8 10 active chip select value ? 16-bit value (low byte): ? msb ? ? ? ? ? ? lsb cs7 cs6 cs5 cs4 cs3 cs2 cs1 cs0 11 active chip select value ? 16-bit value (high byte): ? msb ? ? ? ? ? ? lsb x x x x x x x cs8 12 chip select to data delay (quanta of 100 s) ? 16-bit value (low byte) example : if we have 500 s delay between the cs being asserted and the first byte of data, the value will be 0x0005. - this byte position will have a value of: 0x05
? 2011 microchip technology inc. ds22288a-page 35 mcp2210 figure 3-12: get (vm) spi transfer settings logic flow 13 chip select to data delay (quanta of 100 s) ? 16-bit value (high byte) example : if we have 500 s delay between the cs being asserted and the first byte of data, the value will be 0x0005. - this byte position will have a value of: 0x00 14 last data byte to cs (de-asserted) delay (quanta of 100 s) ? 16-bit value (low byte) example : if we have 500 s delay between the last data byte sent and the cs being de-asserted, the value will be 0x0005. - this byte position will have a value of: 0x05 15 last data byte to cs (de-asserted) delay (quanta of 100 s) ? 16-bit value (high byte) example : if we have 500 s delay between the last data byte sent and the cs being de-asserted, the value will be 0x0005. - this byte position will have a value of: 0x00 16 delay between subsequent data bytes (quanta of 100 s) ? 16-bit value (low byte) example : if we have 500 s delay between two consecutive data bytes, the value will be 0x0005. - this byte position will have a value of: 0x05 17 delay between subsequent data bytes (quanta of 100 s) ? 16-bit value (high byte) example : if we have 500 s delay between two consecutive data bytes, the value will be 0x0005. - this byte position will have a value of: 0x00 18 bytes to transfer per spi transaction ? 16-bit value (low byte) example : if an spi transaction of 1250 bytes long is required, the corresponding hex value will be 0x04e2. - this byte position will have a value of: 0xe2 19 bytes to transfer per spi transaction ? 16-bit value (high byte) example : if an spi transaction of 1250 bytes long is required, the corresponding hex value will be 0x04e2. - this byte position will have a value of: 0x04 20 spi mode ? 0x00 ? spi mode 0 ? 0x01 ? spi mode 1 ? 0x02 ? spi mode 2 ? 0x03 ? spi mode 3 21 - 63 don?t care table 3-34: response 1 structure byte index meaning get ram spi transfer settings response 1 ram spi transfer settings retrieved
mcp2210 ds22288a-page 36 ? 2011 microchip technology inc. 3.2.2 set (vm) spi transfer settings table 3-35: command 1 structure byte index meaning 0 0x40 ? set (vm) spi transfer settings (volatile memory) 1 0x00 ? reserved 2 0x00 ? reserved 3 0x00 ? reserved 4 bit rate (byte 3) ? 32-bit value (byte 0, byte 1, byte 2, byte 3) example : bit rate = 12,000,000 bps = 00b7 1b00 - this byte position will have a value of = 0x00 5 bit rate (byte 2) ? 32-bit value (byte 0, byte 1, byte 2, byte 3) example : bit rate = 12,000,000 bps = 00b7 1b00 - this byte position will have a value of = 0x1b 6 bit rate (byte 1) ? 32-bit value (byte 0, byte 1, byte 2, byte 3) example : bit rate = 12,000,000 bps = 00b7 1b00 - this byte position will have a value of = 0xb7 7 bit rate (byte 0) ? 32-bit value (byte 0, byte 1, byte 2, byte 3) example : bit rate = 12,000,000 bps = 00b7 1b00 - this byte position will have a value of = 0x00 8 idle chip select value ? 16-bit value (low byte): ? msb ? ? ? ? ? ? lsb cs7 cs6 cs5 cs4 cs3 cs2 cs1 cs0 9 idle chip select value ? 16-bit value (high byte): ? msb ? ? ? ? ? ? lsb x x x x x x x cs8 10 active chip select value ? 16-bit value (low byte): ? msb ? ? ? ? ? ? lsb cs7 cs6 cs5 cs4 cs3 cs2 cs1 cs0 11 active chip select value ? 16-bit value (high byte): ? msb ? ? ? ? ? ? lsb x x x x x x x cs8 12 chip select to data delay (quanta of 100 s) ? 16-bit value (low byte) example : if we have 500 s delay between the cs being asserted and the first byte of data, the value will be 0x0005. - this byte position will have a value of: 0x05 13 chip select to data delay (quanta of 100 s) ? 16-bit value (high byte) example : if a 500 s delay between the cs being asserted and the first byte of data is required, the value will be 0x0005. - this byte position will have a value of: 0x00 14 last data byte to cs (de-asserted) delay (quanta of 100 s) ? 16-bit value (low byte) example : if a 500 s delay between the last data byte sent and the cs being asserted is required, the value will be 0x0005. - this byte position will have a value of: 0x05 15 last data byte to cs (de-asserted) delay (quanta of 100 s) ? 16-bit value (high byte) example : if a 500 s delay between the last data byte sent and the cs being de-asserted is required, the value will be 0x0005. - this byte position will have a value of: 0x00
? 2011 microchip technology inc. ds22288a-page 37 mcp2210 3.2.2.1 responses 16 delay between subsequent data bytes (quanta of 100 s) ? 16-bit value (low byte) example : if a 500 s delay between two consecutive data bytes is required, the value will be 0x0005. - this byte position will have a value of: 0x05 17 delay between subsequent data bytes (quanta of 100 s) ? 16-bit value (high byte) example : if a 500 s delay between two consecutive data bytes is required, the value will be 0x0005. - this byte position will have a value of: 0x00 18 bytes to transfer per spi transaction ? 16-bit value (low byte) example : if an spi transaction of 1250 bytes long is required, the corresponding hex value will be 0x04e2. - this byte position will have a value of: 0xe2 19 bytes to transfer per spi transaction ? 16-bit value (high byte) example : if an spi transaction of 1250 bytes long is required, the corresponding hex value will be 0x04e2. - this byte position will have a value of: 0x04 20 spi mode ? 0x00 ? spi mode 0 ? 0x01 ? spi mode 1 ? 0x02 ? spi mode 2 ? 0x03 ? spi mode 3 21-63 don?t care table 3-35: command 1 structure (continued) byte index meaning table 3-36: response 1 structure byte index meaning 0 0x40 ? echoes back the completed command for set (vm) spi transfer settings code 10x00 ? command completed successfully 2 don?t care 3 don?t care 4 bit rate (byte 3) ? 32-bit value (byte 0, byte 1, byte 2, byte 3) example : bit rate = 12,000,000 bps = 00b7 1b00 - this byte position will have a value of = 0x00 5 bit rate (byte 2) ? 32-bit value (byte 0, byte 1, byte 2, byte 3) example : bit rate = 12,000,000 bps = 00b7 1b00 - this byte position will have a value of = 0x1b 6 bit rate (byte 1) ? 32-bit value (byte 0, byte 1, byte 2, byte 3) example : bit rate = 12,000,000 bps = 00b7 1b00 - this byte position will have a value of = 0xb7 7 bit rate (byte 0) ? 32-bit value (byte 0, byte 1, byte 2, byte 3) example : bit rate = 12,000,000 bps = 00b7 1b00 - this byte position will have a value of = 0x00 8 idle chip select value ? 16-bit value (low byte): ? msb ? ? ? ? ? ? lsb cs7 cs6 cs5 cs4 cs3 cs2 cs1 cs0 9 idle chip select value ? 16-bit value (high byte): ? msb ? ? ? ? ? ? lsb x x x x x x x cs8
mcp2210 ds22288a-page 38 ? 2011 microchip technology inc. 10 active chip select value ? 16-bit value (low byte): ? msb ? ? ? ? ? ? lsb cs7 cs6 cs5 cs4 cs3 cs2 cs1 cs0 11 active chip select value ? 16-bit value (high byte): ? msb ? ? ? ? ? ? lsb x x x x x x x cs8 12 chip select to data delay (quanta of 100 s) ? 16-bit value (low byte) example : if we have 500 s delay between the cs being asserted and the first byte of data, the value will be 0x0005. - this byte position will have a value of: 0x05 13 chip select to data delay (quanta of 100 s) ? 16-bit value (high byte) example : if we have 500 s delay between the cs being asserted and the first byte of data, the value will be 0x0005. - this byte position will have a value of: 0x00 14 last data byte to cs (de-asserted) delay (quanta of 100 s) ? 16-bit value (low byte) example : if we have 500 s delay between the last data byte sent and the cs being de-asserted, the value will be 0x0005. - this byte position will have a value of: 0x05 15 last data byte to cs (de-asserted) delay (quanta of 100 s) ? 16-bit value (high byte) example : if we have 500 s delay between the last data byte sent and the cs being de-asserted, the value will be 0x0005. - this byte position will have a value of: 0x00 16 delay between subsequent data bytes (quanta of 100 s) ? 16-bit value (low byte) example : if we have 500 s delay between two consecutive data bytes, the value will be 0x0005. - this byte position will have a value of: 0x05 17 delay between subsequent data bytes (quanta of 100 s) ? 16-bit value (low byte) example : if we have 500 s delay between two consecutive data bytes, the value will be 0x0005. - this byte position will have a value of: 0x00 18 bytes to transfer per spi transaction ? 16-bit value (low byte) example : if an spi transaction of 1250 bytes long is required, the corresponding hex value will be 0x04e2. - this byte position will have a value of: 0xe2 19 bytes to transfer per spi transaction ? 16-bit value (high byte) example : if an spi transaction of 1250 bytes long is required, the corresponding hex value will be 0x04e2. - this byte position will have a value of: 0x04 20 spi mode ? 0x00 ? spi mode 0 ? 0x01 ? spi mode 1 ? 0x02 ? spi mode 2 ? 0x03 ? spi mode 3 21 - 63 don?t care table 3-36: response 1 structure (continued) byte index meaning
? 2011 microchip technology inc. ds22288a-page 39 mcp2210 figure 3-13: set (vm) spi t ransfer settings logic flow 3.2.3 get (vm) current chip settings table 3-37: response 2 structure byte index meaning 00x40 ? set (vm) spi transfer settings ? echos back the given command code 1 0xf8 ? usb transfer in progress ? settings not written 2 don?t care 3-63 don?t care table 3-38: command structure byte index meaning 0 0x20 ? get (vm) gpio current chip settings 1 0x00 ? reserved 2 0x00 ? reserved 3-63 0x00 ? reserved set ram spi transfer settings response 2 true false response 1 requested ram spi settings not written spi transfer ongoing
mcp2210 ds22288a-page 40 ? 2011 microchip technology inc. 3.2.3.1 responses table 3-39: response 1 structure byte index meaning 0 0x20 ? get (vm) gpio current chip settings ? echos back the given command code 1 0x00 ? command completed successfully 2 don?t care 3 don?t care 4 gp0 pin designation ? gpio = 0x00 ? chip selects = 0x01 ? dedicated function pin = 0x02 5 gp1 pin designation ? gpio = 0x00 ? chip selects = 0x01 ? dedicated function pin = 0x02 6 gp2 pin designation ? gpio = 0x00 ? chip selects = 0x01 ? dedicated function pin = 0x02 7 gp3 pin designation ? gpio = 0x00 ? chip selects = 0x01 ? dedicated function pin = 0x02 8 gp4 pin designation ? gpio = 0x00 ? chip selects = 0x01 ? dedicated function pin = 0x02 9 gp5 pin designation ? gpio = 0x00 ? chip selects = 0x01 ? dedicated function pin = 0x02 10 gp6 pin designation ? gpio = 0x00 ? chip selects = 0x01 ? dedicated function pin = 0x02 11 gp7 pin designation ? gpio = 0x00 ? chip selects = 0x01 ? dedicated function pin = 0x02 12 gp8 pin designation ? gpio = 0x00 ? chip selects = 0x01 ? dedicated function pin = 0x02 13 default gpio output ? 16-bit value (low byte): ? msb ? ? ? ? ? ? lsb gp7 gp6 gp5 gp4 gp3 gp2 gp1 gp0
? 2011 microchip technology inc. ds22288a-page 41 mcp2210 14 default gpio output ? 16-bit value (high byte): ? msb ? ? ? ? ? ? lsb x x x x x x x gp8 where x = don?t care 15 default gpio direction ? 16-bit value (low byte): ? msb ? ? ? ? ? ? lsb gp7dir gp6dir gp5dir gp4dir gp3dir gp2dir gp1dir gp0dir 16 default gpio direction ? 16-bit value (high byte): ? msb ? ? ? ? ? ? lsb x x x x x x x gp8dir 17 other chip settings ? enable/disable wake-up, interrupt counting, spi bus release options ? bit 7 ? don?t care ? bit 6 ? don?t care ? bit 5 ? don?t care ? bit 4 ? remote wake-up enabled/disabled - 0 ? remote wake-up disabled - 1 ? remote wake-up enabled ? bit 3 ? dedicated function ? interrupt pin mode ? bit 2 ? dedicated function ? interrupt pin mode ? bit 1 ? dedicated function ? interrupt pin mode - b111 ? reserved - b110 ? reserved - b101 ? reserved - b100 ? count high pulses - b011 ? count low pulses - b100 ? count high pulses - b011 ? count low pulses - b010 ? count rising edges - b001 ? count falling edges - b000 ? no interrupt counting ? bit 0 ? spi bus release enable - 0 = spi bus is released between transfer - 1 = spi bus is not released by the mcp2210 between transfers 18 nvram chip parameters access control ? 0x00 ? chip settings not protected ? 0x40 ? chip settings protected by password access ? 0x80 ? chip settings permanently locked 19-63 don?t care table 3-39: response 1 structure (continued) byte index meaning
mcp2210 ds22288a-page 42 ? 2011 microchip technology inc. figure 3-14: get (vm) current chip settings logic flow 3.2.4 set (vm) current chip settings table 3-40: command structure byte index meaning 0 0x21 ? set (vm) current chip settings 1 0x00 ? reserved 2 0x00 ? reserved 3 0x00 ? reserved 4 gp0 pin designation ? gpio = 0x00 ? chip selects = 0x01 ? dedicated function pin = 0x02 5 gp1 pin designation ? gpio = 0x00 ? chip selects = 0x01 ? dedicated function pin = 0x02 6 gp2 pin designation ? gpio = 0x00 ? chip selects = 0x01 ? dedicated function pin = 0x02 7 gp3 pin designation ? gpio = 0x00 ? chip selects = 0x01 ? dedicated function pin = 0x02 8 gp4 pin designation ? gpio = 0x00 ? chip selects = 0x01 ? dedicated function pin = 0x02 get ram chip settings response 1 ram chip settings retrieved
? 2011 microchip technology inc. ds22288a-page 43 mcp2210 9 gp5 pin designation ? gpio = 0x00 ? chip selects = 0x01 ? dedicated function pin = 0x02 10 gp6 pin designation ? gpio = 0x00 ? chip selects = 0x01 ? dedicated function pin = 0x02 11 gp7 pin designation ? gpio = 0x00 ? chip selects = 0x01 ? dedicated function pin = 0x02 12 gp8 pin designation ? gpio = 0x00 ? chip selects = 0x01 ? dedicated function pin = 0x02 13 default gpio output ? 16-bit value (low byte): ? msb ? ? ? ? ? ? lsb gp7 gp6 gp5 gp4 gp3 gp2 gp1 gp0 14 default gpio output ? 16-bit value (high byte): ? msb ? ? ? ? ? ? lsb x x x x x x x gp8 where x = don?t care 15 default gpio direction ? 16-bit value (low byte): ? msb ? ? ? ? ? ? lsb gp7dir gp6dir gp5dir gp4dir gp3dir gp2dir gp1dir gp0dir 16 default gpio direction ? 16-bit value (high byte): ? msb ? ? ? ? ? ? lsb x x x x x x x gp8dir table 3-40: command structure (continued) byte index meaning
mcp2210 ds22288a-page 44 ? 2011 microchip technology inc. 17 other chip settings ? enable/disable wake-up, interrupt counting, spi bus release options ? bit 7 ? don?t care ? bit 6 ? don?t care ? bit 5 ? don?t care ? bit 4 ? remote wake-up enabled/disabled - 0 ? remote wake-up disabled - 1 ? remote wake-up enabled ? bit 3 ? dedicated function ? interrupt pin mode ? bit 2 ? dedicated function ? interrupt pin mode ? bit 1 ? dedicated function ? interrupt pin mode - b111 ? reserved - b110 ? reserved - b101 ? reserved - b100 ? count high pulses - b011 ? count low pulses - b100 ? count high pulses - b011 ? count low pulses - b010 ? count rising edges - b001 ? count falling edges - b000 ? no interrupt counting ? bit 0 ? spi bus release enable - 0 = spi bus is released between transfer - 1 = spi bus is not released by the mcp2210 between transfers 18-63 reserved (fill in with 0x00) table 3-40: command structure (continued) byte index meaning
? 2011 microchip technology inc. ds22288a-page 45 mcp2210 figure 3-15: set (vm) current chip settings logic flow table 3-41: response 1 structure byte index meaning 0 0x21 ? set (vm) current chip settings ? echos back the given command code 1 0x00 ? command completed successfully 2 don?t care 3-63 don?t care set ram chip settings response 1 ram chip settings written
mcp2210 ds22288a-page 46 ? 2011 microchip technology inc. 3.2.5 get (vm) gpio current pin direction 3.2.5.1 responses figure 3-16: get (vm) gpio cu rrent pin direction logic flow table 3-42: command structure byte index meaning 0 0x33 ? get (vm) gpio current pin direction 1 0x00 ? reserved 2 0x00 ? reserved 3-63 0x00 ? reserved table 3-43: response 1 structure byte index meaning 00x33 ? get (vm) gpio current pin direction ? echos back the given command code 10x00 ? command completed successfully 2 don?t care 3 don?t care 4 gpio direction ? 16-bit value (low byte): ? msb ? ? ? ? ? ? lsb gp7dir gp6dir gp5dir gp4dir gp3dir gp2dir gp1dir gp0dir 5 gpio direction ? 16-bit value (high byte): ? msb ? ? ? ? ? ? lsb x x x x x x x gp8dir 6-63 don?t care note 1: this command will only have an effect on those gps previously configured as gpios. get ram gpio direction response 1 ram gpio direction retrieved
? 2011 microchip technology inc. ds22288a-page 47 mcp2210 3.2.6 set (vm) gpio current pin direction 3.2.6.1 responses figure 3-17: set (vm) gpio curr ent pin direction logic flow table 3-44: command structure byte index meaning 0 0x32 ? set (vm) gpio current pin direction 1 0x00 ? reserved 2 0x00 ? reserved 3 0x00 ? reserved 4 gpio direction ? 16-bit value (low byte): ? msb ? ? ? ? ? ? lsb gp7dir gp6dir gp5dir gp4dir gp3dir gp2dir gp1dir gp0dir 5 gpio direction ? 16-bit value (high byte): ? msb ? ? ? ? ? ? lsb x x x x x x x gp8dir 6-63 0x00 ? reserved table 3-45: response 1 structure byte index meaning 0 0x32 ? set (vm) gpio current pin direction ? echos back the given command code 1 0x00 ? command completed successfully 2 don?t care 3-63 don?t care set ram gpio direction response 1 ram gpio direction written
mcp2210 ds22288a-page 48 ? 2011 microchip technology inc. 3.2.7 get gpio current pin value 3.2.7.1 responses figure 3-18: get gpio current pin value logic flow table 3-46: command structure byte index meaning 0 0x31 ? get (vm) gpio current pin value 1 0x00 ? reserved 2 0x00 ? reserved 3-63 0x00 ? reserved table 3-47: response 1 structure byte index meaning 00x31 ? get (vm) gpio current pin value ? echos back the given command code 10x00 ? command completed successfully 2 don?t care 3 don?t care 4 gpio pin value ? 16-bit value (low byte): ? msb ? ? ? ? ? ? lsb gp7val gp6val gp5val gp4val gp3val gp2val gp1val gp0val 5 gpio pin value ? 16-bit value (high byte): ? msb ? ? ? ? ? ? lsb x x x x x x x gp8val 6-63 don?t care note 1: this command will only have an effect on those gps previously assigned to a gpio functionality. get ram gpio value response 1 ram gpio value retrieved
? 2011 microchip technology inc. ds22288a-page 49 mcp2210 3.2.8 set gpio current pin value 3.2.8.1 responses figure 3-19: set gpio curre nt pin value logic flow table 3-48: command structure byte index meaning 00x30 ? set (vm) gpio current pin value 10x00 ? reserved 20x00 ? reserved 30x00 ? reserved 4 gpio pin value ? 16-bit value (low byte): ? msb ? ? ? ? ? ? lsb gp7val gp6val gp5val gp4val gp3val gp2val gp1val gp0val 5 gpio pin value ? 16-bit value (high byte): ? msb ? ? ? ? ? ? lsb x x x x x x x gp8val 6-63 0x00 ? reserved note 1: the gpio pin value will have an effect only on those gps previously configured as gpios. table 3-49: response 1 structure byte index meaning 0 0x30 ? set (vm) gpio current pin value ? echos back the given command code 10x00 - command completed successfully 2 don?t care 3 don?t care 4 read back actual gpio pin value ? 16-bit value (low byte): ? msb ? ? ? ? ? ? lsb gp7val gp6val gp5val gp4val gp3val gp2val gp1val gp0val 5 read back actual gpio pin value ? 16-bit value (high byte): ? msb ? ? ? ? ? ? lsb x x x x x x x gp8val 6-63 don?t care set ram gpio output value response 1 ram gpio output value written
mcp2210 ds22288a-page 50 ? 2011 microchip technology inc. 3.3 read/write eeprom memory this set of commands/responses described in this section relates to the manipulation of the eeprom memory. 3.3.1 read eeprom memory 3.3.1.1 responses figure 3-20: read eepr om memory logic flow table 3-50: command structure byte index meaning 00x50 ? read eeprom memory ? command code 1 eeprom memory address to be read 20x00 ? reserved 3-63 0x00 ? reserved table 3-51: response 1 structure byte index meaning 0 0x50 ? read eeprom memory ? echos back the given command code 1 0x00 ? command completed successfully 2 eeprom memory address 3 eeprom memory content at the requested address 4-63 don?t care read eeprom memory location response 1 eeprom memory location content retrieved
? 2011 microchip technology inc. ds22288a-page 51 mcp2210 3.3.2 write eeprom memory 3.3.2.1 responses table 3-52: command structure byte index meaning 00x51 ? write eeprom memory ? command code 1 eeprom memory address to be written 2 the value to be written to at the given address 3-63 0x00 ? reserved table 3-53: response 1 structure byte index meaning 0 0x51 ? write eeprom memory ? echos back the given command code 1 0x00 ? command completed successfully 2 don?t care 3-63 don?t care table 3-54: response 2 structure byte index meaning 0 0x51 ? write eeprom memory ? echos back the given command code 10xfa ? eeprom write failure 2 don?t care 3-63 don?t care table 3-55: response 3 structure byte index meaning 0 0x51 ? write eeprom memory ? echos back the given command code 10xfb ? eeprom is password protected or permanently locked 2 don?t care 3-63 don?t care
mcp2210 ds22288a-page 52 ? 2011 microchip technology inc. figure 3-21: write eeprom memory logic flow false true false false false true true true response 1 response 2 response 3 response 3 write eeprom memory location conditional access password protected was access password previously entered correctly? eeprom write failure permanent lock requested eeprom memory location not written wrong password requested eeprom memory location not written requested nvram spi settings not written eeprom memory location written
? 2011 microchip technology inc. ds22288a-page 53 mcp2210 3.4 external interrupt pin (gp6) event status the external interrupt pin event status command is used by the usb host to query the external interrupt events recorded by the mcp2210. in order to have the mcp2210 record the number of external interrupt events, gp6 must be configured to have its dedicated function active. 3.4.1 get (vm) the current number of events from the interrupt pin 3.4.1.1 responses figure 3-22: get (vm) the current number of events from the interrupt pin logic flow table 3-56: command structure byte index meaning 00x12 ? get (vm) the current number of events from the interrupt pin 1 reset or not the event counter ? 0x00 ? reads, then resets the event counter ? any other value ? the event counter is read, however, the counter is not reset 2-63 0x00 - reserved table 3-57: response 1 structure byte index meaning 0 0x12 ? get (vm) the current number of events from the interrupt pin ? echos back the given command code 1 0x00 ? command completed successfully 2 don?t care 3 don?t care 4 interrupt event counter ? 16-bit value (low byte) 5 interrupt event counter ? 16-bit value (high byte) 63-63 don?t care get external interrupt pin events counter response 1 external interrupt pin event counter value retrieved
mcp2210 ds22288a-page 54 ? 2011 microchip technology inc. 3.5 spi data transfer the set of commands/responses described in this section relates to the spi data transfer functionality. 3.5.1 transfer spi data 3.5.1.1 responses table 3-58: command structure byte index meaning 00x42 ? transfer spi data ? command code 1 the number of bytes to be transferred in this packet (from 0 to 60 inclusively) 20x00 ? reserved 30x00 ? reserved 4-63 the spi data to be sent on the data transfer table 3-59: response 1 structure byte index meaning 0 0x42 ? transfer spi data ? echos back the given command code 10xf7 ? spi data not accepted ? spi bus not available (the external owner has control over it) 2 don?t care 3-63 don?t care table 3-60: responses 2 structure byte index meaning 0 0x42 ? transfer spi data ? echos back the given command code 1 0x00 ? spi data accepted ? command completed successfully ? spi data accepted 2 how many spi received data bytes the chip is sending back to the host 3 spi transfer engine status ? 0x20 ? spi transfer started ? no data to receive 4-63 spi received data bytes . the number of data bytes is specified at byte index 2 table 3-61: response 3 structure byte index meaning 0 0x42 ? transfer spi data ? echos back the given command code 10xf8 ? spi data not accepted ? spi transfer in progress ? cannot accept any data for the moment 2 don?t care 3-63 don?t care
? 2011 microchip technology inc. ds22288a-page 55 mcp2210 figure 3-23: transfer spi data logic flow table 3-62: response 4 structure byte index meaning 0 0x42 ? transfer spi data ? echos back the given command code 1 0x00 ? spi data accepted ? command completed successfully ? spi data accepted 2 how many spi received data bytes the chip is sending back to the host 3 0x30 ? spi transfer engine status: spi transfer not finished; received data available 4-63 spi received data bytes . the number of data bytes is specified at byte index 2 table 3-63: response 5 structure byte index meaning 0 0x42 ? transfer spi data ? echos back the given command code 1 0x00 ? spi data accepted ? command completed successfully ? spi data accepted 2 how many spi received data bytes the chip is sending back to the host 3 0x10 ? spi transfer engine status : spi transfer finished ? no more data to send 4-63 spi received data bytes . the number of data bytes is specified at byte index 2 transfer spi data false true true true true false false false ongoing spi transfer response 1 response 2 response 3 response 5 response 4 spi bus used by external master spi bus owned by an external master spi data accepted the spi transfer will start afterwards spi transfer ended spi transfer waiting for more data spi engine waiting for more data packets to complete the spi transfer spi transfer ended the response will contain the last received spi data packet of the spi transfer ongoing spi transfer cannot accept any data now
mcp2210 ds22288a-page 56 ? 2011 microchip technology inc. 3.5.2 cancel the current spi transfer 3.5.2.1 responses figure 3-24: cancel the current spi transfer logic flow table 3-64: command structure byte index meaning 00x11 ? cancel the current spi transfer ? command code 1 0x00 ? reserved 2 0x00 ? reserved 3-63 0x00 ? reserved table 3-65: response 1 structure byte index meaning 00x11 ? cancel the current spi transfer ? echos back the given command code 1 0x00 ? command completed successfully 2 spi bus release external request status ? 0x01 ? no external request for spi bus release ? 0x00 ? pending external request for spi bus release 3 spi bus current owner ? 0x00 ? no owner ? 0x01 ? usb bridge ? 0x02 ? external master 4 attempted password accesses ? informs the usb host on how many times the nvram password was tried 5 password guessed ? 0x00 ? password not guessed ? 0x01 ? password guessed 6-63 don?t care cancel current spi transfer response 1 spi transfer cancelled
? 2011 microchip technology inc. ds22288a-page 57 mcp2210 3.5.3 request spi bus release 3.5.3.1 responses table 3-66: command structure byte index meaning 00x80 ? request spi bus release ? command code 1 the value of the spi bus release ack pin (only if gp7 is assigned to this dedicated function) 20x00 ? reserved 3-63 0x00 ? reserved table 3-67: response 1 structure byte index meaning 0 0x80 ? request spi bus release ? echos back the given command code 1 0x00 ? command completed successfully ? spi bus released 2 don?t care 3-63 don?t care table 3-68: responses 2 structure byte index meaning 0 0x80 ? request spi bus release ? echos back the given command code 10xf8 ? spi bus not released ? spi transfer in process 2 don?t care 3-63 don?t care
mcp2210 ds22288a-page 58 ? 2011 microchip technology inc. figure 3-25: request spi bus release logic flow request spi bus release spi transfer ongoing false true response 2 response 1 spi bus release accepted spi bus release not accepted spi transfer ongoing
? 2011 microchip technology inc. ds22288a-page 59 mcp2210 3.6 chip status the chip status command is used to retrieve status information regarding the state of the spi transfer engine. 3.6.1 get mcp2210 status 3.6.1.1 responses figure 3-26: get mcp2210 status logic flow table 3-69: command structure byte index meaning 0 0x10 ? get mcp2210 status ? command code 1 0x00 ? reserved 2 0x00 ? reserved 3-63 0x00 ? reserved table 3-70: response 1 structure byte index meaning 0 0x10 ? get mcp2210 status ? echos back the given command code 1 0x00 ? command completed successfully 2 spi bus release external request status ? 0x01 ? no external request for spi bus release ? 0x00 ? pending external request for spi bus release 3 spi bus current owner ? 0x00 ? no owner ? 0x01 ? usb bridge ? 0x02 ? external master 4 attempted password accesses ? informs the usb host on how many times the nvram password was tried 5 password guessed ? 0x00 ? password not guessed ? 0x01 ? password guessed 6-63 don?t care get mcp2210 status response 1 mcp2210 status information retrieved
mcp2210 ds22288a-page 60 ? 2011 microchip technology inc. 3.6.2 unsupported command codes 3.6.2.1 responses table 3-71: command structure byte index meaning 0 usupported command code 1 don?t care 2-63 don?t care table 3-72: response 1 structure byte index meaning 0 unsupported command code sent ? echos back the given command code 10xf9 ? unknown command ? no effect 2-63 don?t care
? 2011 microchip technology inc. ds22288a-page 61 mcp2210 notes:
mcp2210 ds22288a-page 62 ? 2011 microchip technology inc. 4.0 electrical characteristics absolute maximum ratings (?) ambient temperature under bias ................................................................................................. ........ -40c to +85c storage temperature ............................................................................................................ ............ -65c to +150c voltage on v dd with respect to v ss ................................................................................................... -0.3v to +6.0v voltage on mclr with respect to vss ................................................................................................. -0.3v to +9.0v voltage on v usb pin with respect to v ss ............................................................................................ -0.3v to +4.0v voltage on d+ and d- pins with respect to v ss ...................................................................... -0.3v to (v usb + 0.3v) voltage on all other pins with respect to v ss ............................................................................ -0.3v to (v dd + 0.3v) total power dissipation ( 1 ) ............................................................................................................................... 800 mw maximum current out of v ss pin ...................................................................................................................... 95 ma maximum current into v dd pin ......................................................................................................................... 9 5ma clamp current, i k (v pin < 0 or v pin > v dd ) ??????????????????????????????????????????????????????????????? ??????????????????????????????????????????????????? 20 ma maximum output current sunk by any i/o pin..................................................................................... ............... 25 ma maximum output current sourced by any i/o pin.................................................................................. ............. 25 ma maximum current sunk by all ports.............................................................................................. ......................90 ma maximum current sourced by all ports ........................................................................................... .................. 90 ma note 1: power dissipation is calculated as follows: p dis = v dd x {i dd ? ? i oh } + ? {(v dd ? v oh ) x i oh } + ? (v o l x i ol ). 2: v usb must always be ? v dd + 0.3v ? notice: stresses above those listed under ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. exposure above maximum rating conditions for extended periods may affect device reliability.
? 2011 microchip technology inc. ds22288a-page 63 mcp2210 4.1 dc characteristics dc characteristics operating conditions (unless otherwise indicated): 3.0v ?? v dd ? 5.5v at -40 ? c ? t a ? +85 ? c (i-temp) param no. characteristic sym min typ max units conditions d001 supply voltage v dd 3.3 ? 5.5 v power-on reset release voltage v por 1.6 v power-on reset rearm voltage 0.8 v d003 v dd rise rate to ensure power-on reset sv dd 0.05 ? ? v/ms design guidance only not tested d004 supply current i dd v dd = 3.0v ? 10 12 ma f osc = 12 mhz, (330 nf on v usb ) v dd = 5.0v ? 13 15 ma d005 standby current i dds ?9?a input low voltage d031 schmitt trigger (gp0?3, 6?8, mosi, miso, sck) v il ??0.2v dd v 3.0v ?? v dd ? 5.5v ttl (gp4, gp5) ? ? 0.8 4.5v ?? v dd ? 5.5v input high voltage d041 schmitt trigger (gp0?3, 6?8, mosi, miso, sck) v ih 0.8 v dd ?v dd v 3.0v ?? v dd ? 5.5v ttl (gp4, gp5) 2.0 ? v dd 4.5v ?? v dd ? 5.5v input leakage current d060 gp0?8, mosi, miso, sck i il ?50100 na v ss ?? v pin ?? v dd , pin at hi-z rst 50 200 osc1 50 100 output low voltage d080 gp0?8, mosi, miso, sck v ol ??0.6vi ol = 8.0 ma, v dd = 5.0v ??0.6 i ol = 6.0 ma, v dd = 3.3v output high voltage d090 gp0?8, mosi, miso, sck v oh v dd ? 0.7 ? ? v i oh = -3.5 ma, v dd = 5.0v v dd ? 0.7 ? ? i oh = -3.0 ma, v dd = 3.3v capacitive loading specs on output pins d101 osc2 c osc 2 ??15pf note 1 d102 gp0?8, mosi, miso, sck c io ??50pf note 1 note 1: this parameter is characterized, but not tested.
mcp2210 ds22288a-page 64 ? 2011 microchip technology inc. figure 4-1: por and por rearm with slow rising v dd v dd v por v porr v ss v ss npor ( 1 ) t por ( 3 ) por rearm note 1: when npor is low, the device is held in reset. 2: t por 1 ? s typical. 3: t vlow 2.7 ? s typical. t vlow ( 2 ) table 4-1: usb modul e specifications dc characteristics operating conditions (unless otherwise indicated): 3.0v ?? v dd ? 5.5v at -40 ? c ? t a ? +85 ? c (i-temp) param no. characteristic sym min typ max units conditions d313 usb voltage v usb 3.0 ? 3.6 v voltage on v usb pin must be in this range for proper usb operation d314 input leakage on pin i il ??1 av ss ?? v pin ?? v dd pin at ? high-impedance d315 input low voltage for usb buffer v ilusb ??0.8vfor v usb range d316 input high voltage for usb buffer v ihusb 2.0 ? ? v for v usb range d318 differential input sensitivity v difs ? ? 0.2 v the difference between d+ and d- must exceed this value while v cm is met d319 differential common mode range v cm 0.8 ? 2.5 v d320 driver output impedance ( 1 ) z out 28 ? 44 ? d321 voltage output low v ol 0.0 ? 0.3 v 1.5 k ?? load connected to 3.6v d322 voltage output high v oh 2.8 ? 3.6 v 1.5 k ?? load connected to ground note 1: the d+ and d- signal lines have been built-in impedance matching resistors. no external resistors, capacitors or magnetic components are necessary on the d+/d- signal paths between the mcp2210 family device and the usb cable.
? 2011 microchip technology inc. ds22288a-page 65 mcp2210 table 4-2: thermal considerations standard operating conditions (unless otherwise stated) operating temperature -40 ? c ? t a ? +85 ? c (i-temp) param no. sym characteristic typ units conditions th01 ja thermal resistance junction to ambient 85.2 ? c/w 20-pin soic package 108.1 ? c/w 20-pin ssop package 36.1 ? c/w 20-pin qfn 5x5 mm package th02 jc thermal resistance junction to case 24 ? c/w 20-pin soic package 24 ? c/w 20-pin ssop package 1.7 ? c/w 20-pin qfn 5x5 mm package th03 t jmax maximum junction temperature 150 ? c th04 pd power dissipation ? w pd = p internal + p i / o th05 p internal internal power dissipation ? w p internal = i dd x v dd (1) th06 p i / o i/o power dissipation ? w p i / o = ? (i ol * v ol ) + ? (i oh * (v dd ? v oh )) th07 p der derated power ? w p der = pd max (t j - t a )/ ja (2,3) note 1: i dd is the current to run the chip alone without driving any load on the output pins. 2: t a = ambient temperature. 3: t j = junction temperature.
mcp2210 ds22288a-page 66 ? 2011 microchip technology inc. 4.2 ac characteristics 4.2.1 timing parameter symbology the timing parameter symbols have been created in one of the following formats: 4.2.2 timing conditions the operating temperature and voltage specified in table 4-3 apply to all timing specifications unless other- wise noted. figure 4-2 specifies the load conditions for the timing specifications. table 4-3: temperature and voltag e specifications ? ac figure 4-2: load conditions for device timing specifications 1. tpps2pps 2. tpps t f frequency t time e error lowercase letters (pp) and their meanings: pp io input or output pin osc oscillator rx receive tx transmit bitclk rx/tx bitclk rst reset drt device reset timer uppercase letters and their meanings: s ffall pperiod hhigh rrise i invalid (high-impedance) v valid l low z high-impedance ac characteristics standard operating conditions (unless otherwise stated) operating temperature -40 ? c ? t a ? +85 ? c operating voltage v dd range as described in dc spec, section 4.1 ?dc characteristics? . 50 pf (15 pf for osc2) pin
? 2011 microchip technology inc. ds22288a-page 67 mcp2210 4.2.3 timing diagrams and specifications table 4-4: reset, oscillator start-up timer and power-up timer parameters standard operating conditions (unless otherwise stated) operating temperature -40c ?? t a ?? +85c param no. sym characteristic min typ ? max units conditions 30 t rst mclr pulse width (low) 2?? s 31 t pwrt power-up timer 40 65 140 ms 32 t ost oscillator start-up time ? 1024 ? t ost * these parameters are characterized but not tested. ? data in ?typ? column is at 5v, 25c unless otherwise stated. these parameters are for design guidance only and are not tested.
mcp2210 ds22288a-page 68 ? 2011 microchip technology inc. 5.0 packaging information 5.1 package marking information legend: xx...x customer-specific information y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code pb-free jedec designator for matte tin (sn) * this package is pb-free. the pb-free jedec designator ( ) can be found on the outer packaging for this package. note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 3 e 3 e 20-lead soic example 20-lead 5x5 qfn example 20-lead ssop example pin 1 pin 1 mcp2210 i/mq ^^ 1146256 3 e mcp2210 i/so ^^ 1146256 3 e mcp2210 i/ss ^^ 1146256 3 e
? 2011 microchip technology inc. ds22288a-page 69 mcp2210 20-lead plastic quad flat, no lead package (mq) ? 5x5x0.9 mm body [qfn] note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging microchip technology drawing c04-120a
mcp2210 ds22288a-page 70 ? 2011 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
? 2011 microchip technology inc. ds22288a-page 71 mcp2210 note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
mcp2210 ds22288a-page 72 ? 2011 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
? 2011 microchip technology inc. ds22288a-page 73 mcp2210 note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
mcp2210 ds22288a-page 74 ? 2011 microchip technology inc.
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? 2011 microchip technology inc. ds22288a-page 75 mcp2210 note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
mcp2210 ds22288a-page 76 ? 2011 microchip technology inc. notes:
? 2011 microchip technology inc. ds22288a-page 77 mcp2210 appendix a: revision history revision a (december, 2011) ? original release of this document.
mcp2210 ds22288a-page 78 ? 2011 microchip technology inc. notes:
? 2011 microchip technology inc. ds22288a-page 79 mcp2210 product identification system to order or obtain information, e. g., on pricing or delivery, refer to the factory or the listed sales office . device: mcp2210: usb to spi protocol converter with gpio mcp2210t: usb to spi protocol converter with gpio (tape and reel) temperature range: i= -40 ? c to +85 ? c (industrial) package: mq = plastic quad flat, no lead package 5x5x0.9 mm body (qfn), 20-lead so = plastic small outline - wide, 7.50 mm body (so), 20-lead ss = plastic shrink small outline - 5.30 mm body (ss) 20-lead examples: a) mcp2210- i/mq: industrial temperature, 20ld qfn package. b) mcp2210t- i/mq: tape and reel, industrial temperature, 20ld qfn package. a) mcp2210- i/so: industrial temperature, 20ld soic package. b) mcp2210t- i/so: tape and reel, industrial temperature, 20ld soic package. a) mcp2210- i/ss: industrial temperature, 20ld ssop package. b) mcp2210t- i/ss: tape and reel, industrial temperature, 20ld ssop package. part no. x /xx package temperature range device
mcp2210 ds22288a-page 80 ? 2011 microchip technology inc. notes:
? 2011 microchip technology inc. ds22288a-page 81 information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application meets with your specifications. microchip makes no representations or warranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safety applications is entirely at the buyer?s risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting from such use. no licenses are conveyed, implicitly or otherwise, under any microchip intellectual property rights. trademarks the microchip name and logo, the microchip logo, dspic, k ee l oq , k ee l oq logo, mplab, pic, picmicro, picstart, pic 32 logo, rfpic and uni/o are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. filterlab, hampshire, hi-tech c, linear active thermistor, mxdev, mxlab, seeval and the embedded control solutions company are registered trademarks of microchip technology incorporated in the u.s.a. analog-for-the-digital age, app lication maestro, chipkit, chipkit logo, codeguard, dspicdem, dspicdem.net, dspicworks, dsspeak, ecan, economonitor, fansense, hi-tide, in-circuit serial programming, icsp, mindi, miwi, mpasm, mplab certified logo, mplib, mplink, mtouch, omniscient code generation, picc, picc-18, picdem, picdem.net, pickit, pictail, real ice, rflab, select mode, total endurance, tsharc, uniwindriver, wiperlock and zena are trademarks of microchip technology incorporated in the u.s.a. and other countries. sqtp is a service mark of microchip technology incorporated in the u.s.a. all other trademarks mentioned herein are property of their respective companies. ? 2011, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. isbn: 978-1-61341-902-1 note the following details of the code protection feature on microchip devices: ? microchip products meet the specification cont ained in their particular microchip data sheet. ? microchip believes that its family of products is one of the most secure families of its kind on the market today, when used i n the intended manner and under normal conditions. ? there are dishonest and possibly illegal methods used to breach the code protection feature. all of these methods, to our knowledge, require using the microchip produc ts in a manner outside the operating specif ications contained in microchip?s data sheets. most likely, the person doing so is engaged in theft of intellectual property. ? microchip is willing to work with the customer who is concerned about the integrity of their code. ? neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are co mmitted to continuously improvin g the code protection features of our products. attempts to break microchip?s code protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona; gresham, oregon and design centers in california and india. the company?s quality system processes and procedures are for its pic ? mcus and dspic ? dscs, k ee l oq ? code hopping devices, serial eeproms, microperipherals, nonvolatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001:2000 certified.
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